Relevant prior art includes:    [1]N. Mielke, H. Belgal, I. Kalastrisky, P. Kalavade, A. Kurtz, Q. Meng, N. Righos, and J. Wu, “Flash EEPROM Threshold Instabilities due to Charge Trapping During Program/Erase Cycling”, IEEE Trans. On Device and Materials Reliability, Vol. 4, No. 3, September 2004    [2]J.-D. Lee, J.-H. Choi, D. Park and K. Kim “Degradation of tunnel oxide by FN current stress and its effects on data retention characteristics of 90 nm,” Proc. IRES, 2003, p. 497.    [3] G. Wong, “The Next Killer Technologies?: 3-bit and 4-bit per cell NAND Flash Memories”. Web-Feet Research, Inc. Report: MTS340MB-28, December 2007    [4] E. Gal and S. Toled, “A Transactional File System for Microcontrollers”, 2005 USENIX Annual Technical Conference, p. 89-104    [5] YAFFS, available on the World Wide Web at yaffs.net/yaffs-documentation    [6] U.S. Pat. Nos. 7,301,818, 7,325,090; published US Application 2007211534, and Published PCT application WO2007132452,    [7] an Intel Corporation presentation entitled “Reliability of floating-gate flash memories”, by Neal Mielke, presented by Hanmant Belgal and available on Internet on 23 Mar. 2008.
Notations such as [1], [2], [3], [4], [5] are used in the specification to indicate reference to the above documents.
The disclosures of all publications and patent documents mentioned in the specification, and of the publications and patent documents cited therein directly or indirectly, are hereby incorporated by reference.